u8 Receive_data=0;u8 tmp_buf[32];const u8 TX_ADDRESS[TX_A...
u8 Receive_data=0;
u8 tmp_buf[32];
= 0x34,0x43,0x10,0x10,0x0; ///send address
= 0x34,0x43,0x10,0x10,0x0; ///send address
//Initialize the IO port of 24L01
void NRF24L01_Init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA|RCC_APB2Periph_GPIOB,ENABLE);
//Configure PA4 that is CE
GPIO_InitStructure.GPIO_Pin=GPIO_Pin_4;
GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode=GPIO_Mode_Out_PP;
GPIO_Init(GPIOA,&GPIO_InitStructure);
//Configure PC5 which is IRQ
GPIO_InitStructure.GPIO_Pin=GPIO_Pin_5;
GPIO_InitStructure.GPIO_Mode=GPIO_Mode_IPU;
//GPIO_Init(GPIOC,&GPIO_InitStructure);
GPIO Init (GPIOB, &GPIO InitStructure); ///renumber as B5
SPIx Init(); / /initialization of SPI
NRF24L01 CE=0; //enabled 24L01,ce lower, enter stand-by mode I
NRF24L01 CSN=1; ///SPI
}
void NRF24L01_EXTI_RX(void)
{
EXTI_InitTypeDef EXTI_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
//Link PC5 to EXTI5
//Change to link PB5 to EXTI5
GPIO_EXTILineConfig(GPIO_PortSourceGPIOB,GPIO_PinSource5);
//Configuration EXTI5
EXTI_InitStructure.EXTI_Line=EXTI_Line5;
EXTI_InitStructure.EXTI_Mode=EXTI_Mode_Interrupt;
EXTI_InitStructure.EXTI_Trigger=EXTI_Trigger_Falling;
EXTI_InitStructure.EXTI_LineCmd=ENABLE;
EXTI_Init(&EXTI_InitStructure);
//Interrupt settings, priority register division
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
//Interrupt
NVIC_InitStructure.NVIC_IRQChannel=EXTI9_5_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority=0;
NVIC_InitStructure.NVIC_IRQChannelCmd=ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
//Detect whether 24L01 exists
//Return value: 0, success; 1, failure
u8 NRF24L01_Check(void)
{
u8 buf[5]={0XA5,0XA5,0XA5,0XA5,0XA5};
u8 i;
SPIx SetSpeed (SPI SPEED 8); / /spi with 9Mhz (24L01 maximum SPI clock is 10Mhz)
NRF24L01 Write Buf (write reg+TX ADDR,buf, 5);//write the address of five bytes.
NRF24L01 Read Buf (TX ADDR,buf, 5); ///Read written addresses
for(i=0;i<5;i++)if(buf[i]!=0XA5)break;
If(i!=5) return 1;//detect 24L01 error
return 0; / /detect 24L01
}
//SPI write register
//reg: specified register address
//value: written value
u8 NRF24L01_Write_Reg(u8 reg,u8 value)
{
u8 status;
NRF24L01 CSN=0; //enabled SPI transmission
status =SPIx ReadWriteByte(reg);//send the register number
SPIx ReadWriteByte(value); // Write the value of the register
NRF24L01 CSN=1; //ban on SPI transmission
return(status); //return status value
}
//Read SPI register value
//reg: Register to be read
u8 NRF24L01_Read_Reg(u8 reg)
{
u8 reg_val;
NRF24L01 CSN = 0; //enabled SPI transmission
SPIx ReadWriteByte(reg); //send the register number
Reg val=SPIx ReadWriteByte (0XFF);//read the contents of the register
NRF24L01 CSN = 1; // prohibit SPI transmission
return(reg val); //return status value
}
//Read the data of the specified length at the specified position
//reg: register (location)
//*pBuf: Data pointer
//len: data length
/ Return value, this read status register value
u8 NRF24L01_Read_Buf(u8 reg,u8 *pBuf,u8 len)
{
u8 status,u8_ctr;
NRF24L01 CSN = 0; //enabled SPI transmission
status = SPIx ReadWriteByte(reg);//send the register value (location) and read the status value
For (u8 ctr=0; u8 ctr<len; u8 ctr+)pBuf [u8 ctr]=SPIx ReadWriteByte (0XFF);//Readout data
NRF24L01 CSN=1; //offset SPI transmission
return status;//back to read status values
}
//Write data of specified length at the specified location
//reg: register (location)
//*pBuf: Data pointer
//len: data length
/ Return value, this read status register value
u8 NRF24L01_Write_Buf(u8 reg, u8 *pBuf, u8 len)
{
u8 status,u8_ctr;
NRF24L01 CSN = 0; //enabled SPI transmission
status = SPIx ReadWriteByte(reg);//send the register value (location) and read the status value
For (u8 ctr=0; u8 ctr<len; u8 ctr++)SPIx ReadWriteByte(*pBuf++); /// Write data
NRF24L01 CSN = 1; //offset SPI transmission
return status;//back to read status values
}
Send data once/start NRF24L01
//txbuf: the first address of the data to be sent
//return value: sending completion status
u8 NRF24L01_TxPacket(u8 *txbuf)
{
u8 sta;
SPIx SetSpeed (SPI SPEED 8);//spi with 9Mhz (24L01 maximum SPI clock is 10Mhz)
NRF24L01_CE=0;
NRF24L01 Write Buf (WR TX PLOAD, txbuf, TX PLOAD WIDTH);//writing data to TX BUF 32 bytes
NRF24L01 CE=1;//start sending
while (NRF24L01 IRQ!=0);//waiting delivery complete
sta=NRF24L01 Read Reg(STATUS); //Read status register value
NRF24L01 Write Reg (write reg+STATUS, sta); ///cleaning of TX DS or MAX RT stop sign
If (sta&MAX TX) / / Maximum number of re-emergence
{
NRF24L01 Write Reg (FLUSH TX,0xff);//cleaning TX FIFO repository
return MAX_TX;
}
If(sta&TX OK)/send completed
{
return TX_OK;
}
NRF24L01 Write Reg (FLUSH TX,0xff);//cleaning TX FIFO repository
return 0xff;/ other reasons failed to send
}
Send data once/start NRF24L01
//txbuf: the first address of the data to be sent
/ Return value: 0, acceptance complete; other, error code
u8 NRF24L01_RxPacket(u8 *rxbuf)
{
u8 sta;
SPIx SetSpeed (SPI SPEED 8); / /spi with 9Mhz (24L01 maximum SPI clock is 10Mhz)
sta=NRF24L01 Read Reg(STATUS); //Read status register value
NRF24L01 Write Reg (write reg+STATUS, sta); ///clearing RX DR or MAX RT stop sign
If (sta&RX OK)//Received data
{
NRF24L01 Read Buf (RD RX PloAD,rxbuf,RX PloAD WIDTH);//reading data
NRF24L01 Write Reg (FLUSH RX,0xff);//clearing RX FIFO repository
return 0;
}
return 1;//confiscated to any data
}
// This function initializes NRF24L01 to RX mode
// Set RX address, write RX data width, select RF channel, Porter rate and LNA HCURR
/ When the CE gets taller, it's in RX mode and can receive data.
void RX_Mode(void)
{
NRF24L01_CE=0;
NRF24L01 Write Buf(write reg+RX ADDR P0,(u8*)RX ADDRESS,RX ADR WIDTH);//write RX nodes address
NRF24L01 Write Reg (write reg+EN AA,0x01); ///Automated response for energy channel 0
NRF24L01 Write Reg (write reg+EN RXADDR, 0x01);//receipt address of enabling channel 0
NRF24L01 Write Reg (write reg+RF CH,40); ///set up RF communication frequencies
NRF24L01 Write Reg (write reg+RX PW P0, RX PLOAD WIDTH);//select the effective data width of channel 0
NRF24L01 Write Reg (write reg+RF SETUP, 0x0f);//set-up TX launch parameters, 0db gain, 2mbps, low noise gain on
NRF24L01 Write Reg (write reg+CONFIG, 0x0f);//configuring parameters for basic working mode; PWR UP, EN CRC, 16BIT CRC, reception mode
NRF24L01 CE = 1;//CE is high and enters reception mode
}
// This function initializes NRF24L01 to TX mode
// set TX address, write TX data width, set the address for RX automatic response, fill in TX sending data, select RF channel, Porter rate and LNA HCURR
//PWR_UP, CRC enabled
/ When the CE gets taller, it's in RX mode and can receive data.
/ / CE is higher than 10us, then starts sending.
void TX_Mode(void)
{
NRF24L01 CE=0;//Low CE into stand-by mode I because the start-up of the sending and receiving mode was achieved by uplifting CE
NRF24L01 Write Buf (write reg+TX ADDR,(u8*)TX ADDRESS, TX ADR WIDTH);//write TX node address
NRF24L01 Write Buf (write reg+RX ADDR P0,(u8*)RX ADDRESS,RX ADR WIDTH); ////set-up of TX nodes address, primarily to enable ACK
NRF24L01 Write Reg (write reg+EN AA,0x01); ///Automated response for energy channel 0
NRF24L01 Write Reg (write reg+EN RXADDR,0x01); ///received address of energy channel 0
NRF24L01 Write Reg (write reg+SETUP RETR,0x2a);//set autoreverse interval: 750us + 86us; maximum automatic re-offers: 10 times
NRF24L01 Write Reg (write reg+RF CH, 40); ///set-up RF channel 40,fo=2400+RF-CH-mhz
NRF24L01 Write Reg (write reg+RF SETUP, 0x0f); //setting TX launch parameters, 0db gain, 2mbps, low noise gain on
NRF24L01 Write Reg (write reg+CONFIG, 0x0e); /// Parameters for configuration of basic working mode; PWR UP, EN CRC, 16BIT CRC, send mode, open all interruptions
NRF24L01 CE=1;//CE is high and sent after 10us
}